Philip H. Sweany

Publication Activity (10 Years)

Years Active: 1987-2014
Publications (10 Years): 0

Top Topics

Hardware Designs

Professional Development

Top Venues

Publications

Jian Zhang, Philip H. Sweany
Debugging teacher certification (abstract only). SIGCSE (2014)
Hao Li, Jian Huang, Philip H. Sweany, Dijiang Huang
FPGA implementations of elliptic curve cryptography and Tate pairing over a binary field. J. Syst. Archit. 54 (12) (2008)
Jian Huang, Hao Li, Philip H. Sweany
An FPGA implementation of elliptic curve cryptography for future secure web transaction. PDCS (2007)
Wentong Li, Mehran Rezaei, Krishna M. Kavi, Afrin Naz, Philip H. Sweany
Feasibility of decoupling memory management from the execution pipeline. J. Syst. Archit. 53 (12) (2007)
Afrin Naz, Krishna M. Kavi, Wentong Li, Philip H. Sweany
Tiny split data-caches make big performance impact for embedded applications. J. Embed. Comput. 2 (2) (2006)
Wentong Li, Krishna M. Kavi, Afrin Naz, Philip H. Sweany
Speculative Thread Execution in a Multithreaded Dataflow Architecture. PDCS (2006)
Afrin Naz, Krishna M. Kavi, Philip H. Sweany, Wentong Li
A Study of Reconfigurable Split Data Caches and Instruction Caches. PDCS (2006)
Afrin Naz, Mehran Rezaei, Krishna M. Kavi, Philip H. Sweany
Improving data cache performance with integrated use of split caches, victim cache and stream buffers. SIGARCH Comput. Archit. News 33 (3) (2005)
Steve Carr, Philip H. Sweany
Automatic data partitioning for the agere payload plus network processor. CASES (2004)
Afrin Naz, Krishna M. Kavi, Philip H. Sweany, Mehran Rezaei
A Study of Separate Array and Scalar Caches. HPCS (2004)
Afrin Naz, Mehran Rezaei, Krishna Kavi, Philip H. Sweany
Improving data cache performance with integrated use of split caches, victim cache and stream buffers. MEDEA@PACT (2004)
Steve Carr, Philip H. Sweany
An experimental evaluation of scalar replacement on scientific benchmarks. Softw. Pract. Exp. 33 (15) (2003)
Yi Qian, Steve Carr, Philip H. Sweany
Optimizing Loop Performance for Clustered VLIW Architectures. IEEE PACT (2002)
Yi Qian, Steve Carr, Philip H. Sweany
Loop fusion for clustered VLIW architectures. LCTES-SCOPES (2002)
Xianglong Huang, Steve Carr, Philip H. Sweany
Loop Transformations for Architectures with Partitioned Register Banks. LCTES/OM (2001)
Xianglong Huang, Steve Carr, Philip H. Sweany
Loop Transformations for Architectures with Partitioned Register Banks. OM@PLDI (2001)
Jason Hiser, Steve Carr, Philip H. Sweany, Steven J. Beaty
Register Assignment for Software Pipelining with Partitioned Register Banks. IPDPS (2000)
Jason Hiser, Steve Carr, Philip H. Sweany
Global Register Partitioning. IEEE PACT (2000)
Steve Carr, Philip H. Sweany
Improving software pipelining with hardware support for self-spatial loads. SIGARCH Comput. Archit. News 27 (1) (1999)
Philip H. Sweany, Steve Carr, Brett L. Huber
Compiler Optimization for Superscalar Systems: Global Instruction Scheduling without Copies. Digit. Tech. J. 10 (1) (1998)
Vicki H. Allan, Steven J. Beaty, Bogong Su, Philip H. Sweany
Building a Retargetable Local Instruction Scheduler. Softw. Pract. Exp. 28 (3) (1998)
Chen Ding, Steve Carr, Philip H. Sweany
Modulo Scheduling with Cache Reuse Information. Euro-Par (1997)
Steve Carr, Chen Ding, Philip H. Sweany
Improving Software Pipelining with Unroll-and-Jam. HICSS (1) (1996)
Michael J. Bourke III, Philip H. Sweany, Steven J. Beaty
Extending List Scheduling to Consider Execution Frequency. HICSS (1) (1996)
Thomas S. Brasier, Philip H. Sweany, Steven J. Beaty, Steve Carr
CRAIG: a practical framework for combining instruction scheduling and register assignment. PACT (1995)
Philip H. Sweany, Steven J. Beaty
Dominator-path scheduling: a global scheduling method. MICRO (1992)
Philip H. Sweany, Steven J. Beaty
Post-compaction register assignment in a retargetable compiler. MICRO (1990)
Robert A. Mueller, Michael R. Duda, Philip H. Sweany, Jack S. Walicki
Horizon: A Retargetable Compiler for Horizontal Microarchitectures. IEEE Trans. Software Eng. 14 (5) (1988)
Michael A. Howland, Robert A. Mueller, Philip H. Sweany
Trace scheduling optimization in a retargetable microcode compiler. MICRO (1987)