Minh Duc Pham

Publication Activity (10 Years)

Years Active: 2010-2023
Publications (10 Years): 3

Top Topics

Estimation Process

Extended Kalman Filter

Top Venues

IEEE Trans. Aerosp. Electron. Syst.

Publications

Chan Viet Nguyen, Dinh Tuyen Nguyen, Quoc Dung Phan, Duc Hung Nguyen, Hoang Khoa Truong, Minh Duc Pham
Interleaved Floating Boost PFC with Natural Current Balancing. ICSSE (2023)
An Nhuan Le, Dinh Tuyen Nguyen, Quoc Dung Phan, Phuoc Hoa Truong, Minh Duc Pham, Chan Viet Nguyen
4-Phase Floating Buck Converter Based on Series Capacitor Structure. ICSSE (2023)
Minh Duc Pham, Duc Cuong Vu, Thi Thuy Hang Nguyen, Thi-Van-Anh Nguyen, Dinh Dat Vu, Tung Lam Nguyen
Nonlinear Model Predictive Control for Ballbot systems: A benchmark with Hierarchical Sliding Mode and Linear Quadratic controls. ICCAIS (2023)
Minh Duc Pham, Kay Soon Low, Shu Ting Goh, Shoushun Chen
Gain-scheduled extended kalman filter for nanosatellite attitude determination system. IEEE Trans. Aerosp. Electron. Syst. 51 (2) (2015)
Minh Duc Pham, Syed Mahfuzul Aziz
A real-time localization system for an endoscopic capsule. ISSNIP (2014)
Minh Duc Pham, Syed Mahfuzul Aziz
An energy efficient image compression scheme for Wireless Sensor Networks. ISSNIP (2013)
Minh Duc Pham, Syed Mahfuzul Aziz
Object extraction scheme and protocol for energy efficient image communication over wireless sensor networks. Comput. Networks 57 (15) (2013)
Minh Duc Pham, Kay Soon Low, Shoushun Chen
An Autonomous Star Recognition Algorithm with Optimized Database. IEEE Trans. Aerosp. Electron. Syst. 49 (3) (2013)
Syed Mahfuzul Aziz, Minh Duc Pham
Energy Efficient Image Transmission in Wireless Multimedia Sensor Networks. IEEE Commun. Lett. 17 (6) (2013)
Syed Mahfuzul Aziz, Minh Duc Pham
Efficient parallel architecture for multi-level forward discrete wavelet transform processors. Comput. Electr. Eng. 38 (5) (2012)
Minh Duc Pham, Syed Mahfuzul Aziz
FPGA-Based Image Processor Architecture for Wireless Multimedia Sensor Network. EUC (2011)
Syed Mahfuzul Aziz, Minh Duc Pham
Implementation of Low Density Parity Check Decoders using a New High Level Design Methodology. J. Comput. 5 (1) (2010)