Masahiro Sakamoto

Publication Activity (10 Years)

Years Active: 1998-2015
Publications (10 Years): 0

Top Topics

Signal Processing

Top Venues

IEEE Trans. Circuits Syst. I Regul. Pap.

Publications

Hisato Fujisaka, Takeshi Kamio, Chang-Jun Ahn, Masahiro Sakamoto, Kazuhisa Haeiwa
A Sigma-Delta Domain Lowpass Wave Filter. IEEE Trans. Circuits Syst. I Regul. Pap. (1) (2015)
Hiroshi Sugimura, Kazuki Utsumi, Masayuki Kaneko, Kazuki Arima, Masahiro Sakamoto, Yuki Imaizumi, Tomoki Watanabe, Masao Isshiki
Development of immersive display system of web service in living space. GCCE (2014)
Hisato Fujisaka, Masahiro Sakamoto, Chang-Jun Ahn, Takeshi Kamio, Kazuhisa Haeiwa
Sorter-Based Arithmetic Circuits for Sigma-Delta Domain Signal Processing - Part II: Multiplication and Algebraic Functions. IEEE Trans. Circuits Syst. I Regul. Pap. (9) (2012)
Hisato Fujisaka, Takeshi Kamio, Chang-Jun Ahn, Masahiro Sakamoto, Kazuhisa Haeiwa
Sorter-Based Arithmetic Circuits for Sigma-Delta Domain Signal Processing - Part I: Addition, Approximate Transcendental Functions, and Log-Domain Operations. IEEE Trans. Circuits Syst. I Regul. Pap. (9) (2012)
Masahiro Sakamoto, Shuusaku Mizukami, Daisuke Hamano, Hisato Fujisaka
A design of 4-operand redundant binary parallel adder using neuron MOS. ISCAS (2) (2004)
Hisato Fujisaka, Daisuke Hamano, Masahiro Sakamoto, Takeshi Kamio
A binary-quantized pseudo-diffusion system. ISCAS (4) (2004)
Hisato Fujisaka, Masahiro Sakamoto, Mititada Morisue
Bit-Stream Signal Processing Circuits and Their Application. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. (4) (2002)
Yuji Hidaka, Hisato Fujisaka, Masahiro Sakamoto, Mititada Morisue
Piecewise linear operations on sigma-delta modulated signals. ICECS (2002)
Masahiro Sakamoto, Daisuke Hamano, Mititada Morisue
Design of a multiple-operand redundant binary adder. Systems and Computers in Japan 33 (10) (2002)
Hisato Fujisaka, Naoyuki Masuda, Masahiro Sakamoto, Mititada Morisue
Arithmetic circuits for single-bit digital signal processing. ICECS (1999)
Mititada Morisue, Jun Endo, Toshimitu Morooka, Nobuhiro Shimizu, Masahiro Sakamoto
A Josephson Ternary Memory Circuit. ISMVL (1998)