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M. V. Vyawahare
Publication Activity (10 Years)
Years Active: 2012-2012
Publications (10 Years): 0
Top Topics
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Expectation Maximization
Detection Algorithm
High Speed
Top Venues
ICETET
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Publications
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R. V. Kshirsagar
,
M. V. Vyawahare
FPGA Implementation of High Speed VLSI Architectures for AES Algorithm.
ICETET
(2012)