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Kei Nishimura
Publication Activity (10 Years)
Years Active: 2004-2019
Publications (10 Years): 3
Top Topics
Multipath
Markov Chain
Ds Cdma
Error Rate
Top Venues
VTC Fall
PIMRC
APCCAS
VLSI Circuits
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Publications
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Koji Maeda
,
Shoji Yamamoto
,
Naohiro Kohmu
,
Kei Nishimura
,
Izumi Fukasaku
An Active-Copper-Cable with Continuous-Time-Linear-Equalizer IC for 30-AWG 7-meters Reach Interconnect of 400-Gbit/s QSFP-DD.
APCCAS
(2019)
Koji Maeda
,
Takayasu Norimatsu
,
Kenji Kogo
,
Naohiro Kohmu
,
Kei Nishimura
,
Izumi Fukasaku
An Active Copper-Cable Supporting 56-Gbit/s PAM4 and 28-Gbit/s NRZ with Continuous Time Linear Equalizer IC for to-Meters Reach Interconnection.
VLSI Circuits
(2018)
Takahiro Yamaguchi
,
Kei Nishimura
,
Fumiaki Maehara
Theoretical Shannon Capacity Performance of Nonlinearly Amplified Uplink OFDMA Signals in the Presence of Terminal Mobility.
VTC Fall
(2016)
Kei Nishimura
,
Tomoki Maruko
,
Hiromichi Tomeba
,
Takashi Onodera
,
Minoru Kubota
,
Fumiaki Maehara
,
Fumio Takahata
A Novel Modulo Loss Suppression Scheme Employing Theoretical BER Formula for MU-MIMO THP Systems.
VTC Fall
(2015)
Kei Nishimura
,
Shoya Takebuchi
,
Fumiaki Maehara
Theoretical derivation of bit error rate for uplink OFDMA over nonlinear fading channels.
PIMRC
(2013)
Kei Nishimura
,
Koichi Kato
,
Yoichi Muraoka
A system for analyzing and visualizing business solutions provided by information technology companies in Japan.
ICWI
(2004)