Jörg Pfähler

Publication Activity (10 Years)

Years Active: 2012-2020
Publications (10 Years): 5

Top Venues

ABZ

VSTTE

Sci. Comput. Program.

Electron. Commun. Eur. Assoc. Softw. Sci. Technol.

University of Augsburg, Germany (PHD)

Education History

University of Augsburg, Germany

PHD

Publications

Gerhard Schellhorn, Stefan Bodenmüller, Jörg Pfähler, Wolfgang Reif
Adding Concurrency to a Sequential Refinement Tower. ABZ (2020)
Gerhard Schellhorn, Gidon Ernst, Jörg Pfähler, Stefan Bodenmüller, Wolfgang Reif
Symbolic execution for a clash-free subset of ASMs. Sci. Comput. Program. 158 (2018)
Jörg Pfähler, Gidon Ernst, Stefan Bodenmüller, Gerhard Schellhorn, Wolfgang Reif
Modular Verification of Order-Preserving Write-Back Caches. IFM (2017)
Gerhard Schellhorn, Gidon Ernst, Jörg Pfähler, Wolfgang Reif
A Relational Encoding for a Clash-Free Subset of ASMs. ABZ (2016)
Gidon Ernst, Jörg Pfähler, Gerhard Schellhorn, Wolfgang Reif
Modular, crash-safe refinement for ASMs with submachines. Sci. Comput. Program. 131 (2016)
Gidon Ernst, Jörg Pfähler, Gerhard Schellhorn, Wolfgang Reif
Inside a Verified Flash File System: Transactions and Garbage Collection. VSTTE (2015)
Gidon Ernst, Jörg Pfähler, Gerhard Schellhorn, Dominik Haneberg, Wolfgang Reif
KIV: overview and VerifyThis competition. Int. J. Softw. Tools Technol. Transf. 17 (6) (2015)
Gidon Ernst, Jörg Pfähler, Gerhard Schellhorn, Wolfgang Reif
Modular Refinement for Submachines of ASMs. ABZ (2014)
Gerhard Schellhorn, Bogdan Tofan, Gidon Ernst, Jörg Pfähler, Wolfgang Reif
RGITL: A temporal logic framework for compositional reasoning about interleaved programs. Ann. Math. Artif. Intell. 71 (1-3) (2014)
Gerhard Schellhorn, Gidon Ernst, Jörg Pfähler, Dominik Haneberg, Wolfgang Reif
Development of a Verified Flash File System. ABZ (2014)
Bogdan Tofan, Gerhard Schellhorn, Gidon Ernst, Jörg Pfähler, Wolfgang Reif
Compositional Verification of a Lock-Free Stack with RGITL. Electron. Commun. Eur. Assoc. Softw. Sci. Technol. 66 (2013)
Gidon Ernst, Gerhard Schellhorn, Dominik Haneberg, Jörg Pfähler, Wolfgang Reif
Verification of a Virtual Filesystem Switch. VSTTE (2013)
Jörg Pfähler, Gidon Ernst, Gerhard Schellhorn, Dominik Haneberg, Wolfgang Reif
Formal Specification of an Erase Block Management Layer for Flash Memory. Haifa Verification Conference (2013)
Gidon Ernst, Gerhard Schellhorn, Dominik Haneberg, Jörg Pfähler, Wolfgang Reif
A Formal Model of a Virtual Filesystem Switch SSV (2012)

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Publication Activity (10 Years)

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Jörg Pfähler