Isidoro Urriza

Publication Activity (10 Years)

Years Active: 1997-2015
Publications (10 Years): 2

Top Topics

Formative Evaluation

Control Algorithm

Fpga Implementation

Top Venues

IEEE Trans. Ind. Informatics

IEEE Trans. Ind. Electron.

Publications

Óscar Jiménez, Oscar Lucía, Isidoro Urriza, Luis Angel Barragan, Denis Navarro, Venkata Dinavahi
Implementation of an FPGA-Based Online Hardware-in-the-Loop Emulator Using High-Level Synthesis Tools for Resonant Power Converters Applied to Induction Heating Appliances. IEEE Trans. Ind. Electron. 62 (4) (2015)
Alberto Domínguez, Luis Angel Barragan, José Ignacio Artigas, Aránzazu Otín, Isidoro Urriza, Denis Navarro
Reduced-order model of a half-bridge series resonant inverter for power control in domestic induction heating applications. ICIT (2015)
Óscar Jiménez, Oscar Lucía, Isidoro Urriza, Luis Angel Barragan, Denis Navarro
Analysis and Implementation of FPGA-Based Online Parametric Identification Algorithms for Resonant Power Converters. IEEE Trans. Ind. Informatics 10 (2) (2014)
Óscar Jiménez, Oscar Lucía, Isidoro Urriza, Luis Angel Barragan, Denis Navarro
Design and Evaluation of a Low-Cost High-Performance ΣΔ ADC for Embedded Control Systems in Induction Heating Appliances. IEEE Trans. Ind. Electron. 61 (5) (2014)
Alberto Dominguez Vicente, Luis Angel Barragan, Aránzazu Otín, José Ignacio Artigas, Isidoro Urriza, Denis Navarro
Small-signal model of dual half-bridge series resonant inverter sharing resonant capacitor for domestic induction heating. IECON (2014)
Denis Navarro, Oscar Lucía, Luis Angel Barragan, Isidoro Urriza, Óscar Jiménez
High-Level Synthesis for Accelerating the FPGA Implementation of Computationally Demanding Control Algorithms for Power Converters. IEEE Trans. Ind. Informatics 9 (3) (2013)
Óscar Jiménez, Oscar Lucía, Luis Angel Barragan, Denis Navarro, José Ignacio Artigas, Isidoro Urriza
FPGA-Based Test-Bench for Resonant Inverter Load Characterization. IEEE Trans. Ind. Informatics 9 (3) (2013)
Alberto Domínguez, Aránzazu Otín, Luis Angel Barragan, José Ignacio Artigas, Denis Navarro, Isidoro Urriza
Frequency-to-output-power transfer function measurement of a resonant inverter for domestic induction heating applications. IECON (2013)
Óscar Jiménez, Oscar Lucía, Isidoro Urriza, Luis Angel Barragan, José Ignacio Artigas, Denis Navarro
-order sigma-delta A/D converter for current measurement for resonant power converters. IECON (2012)
Oscar Lucía, Luis Angel Barragan, José M. Burdio, Óscar Jiménez, Denis Navarro, Isidoro Urriza
A Versatile Power Electronics Test-Bench Architecture Applied to Domestic Induction Heating. IEEE Trans. Ind. Electron. 58 (3) (2011)
Isidoro Urriza, Luis Angel Barragan, Denis Navarro, José Ignacio Artigas, Oscar Lucía
Word Length Selection Method for Controller Implementation on FPGAs Using the VHDL-2008 Fixed-Point and Floating-Point Packages. EURASIP J. Embed. Syst. 2010 (2010)
José Ignacio Artigas, Isidoro Urriza, Jesús Acero, Luis Angel Barragan, Denis Navarro, José M. Burdio
Power Measurement by Output-Current Integration in Series Resonant Inverters. IEEE Trans. Ind. Electron. 56 (2) (2009)
Luis Angel Barragan, Denis Navarro, Jesús Acero, Isidoro Urriza, José M. Burdio
FPGA Implementation of a Switching Frequency Modulation Circuit for EMI Reduction in Resonant Inverters for Induction Heating Appliances. IEEE Trans. Ind. Electron. 55 (1) (2008)
Alfredo Sanz, José I. García-Nicolás, Isidoro Urriza
Implementing Converters in FPLD. FPL (2002)
Isidoro Urriza, José Ignacio Artigas, Luis Angel Barragan, J. I. Garcia, Denis Navarro
VLSI Implementation of Discrete Wavelet Transform for Lossless Compression of Medical Images. Real Time Imaging 7 (2) (2001)
Isidoro Urriza, José I. García-Nicolás, Alfredo Sanz, Antonio Valdovinos
A System on Chip for Power Line Communications According to European Home Systems Specifications. FPL (2001)
Isidoro Urriza, José Ignacio Artigas, José I. García-Nicolás, Luis Angel Barragan, Denis Navarro
VLSI Architecture for Lossless Compression of Medical Images Using the Discrete Wavelet Transform. DATE (1998)
Isidoro Urriza, J. I. Garcia, Denis Navarro
Instruction issue system for superscalar processors. PDP (1997)