Ireneusz Janiszewski

Publication Activity (10 Years)

Years Active: 2001-2004
Publications (10 Years): 0

Publications

Ireneusz Janiszewski, Hermann Meuth, Bernhard Hoppe
FPGA-efficient phase-to-I/Q architecture. SoCC (2004)
Ireneusz Janiszewski, Hermann Meuth, Bernhard Hoppe
FPGA-Efficient Hybrid LUT/CORDIC Architecture. FPL (2004)
Ireneusz Janiszewski, Bernhard Hoppe, Hermann Meuth
Modelling and Simulation in the Design Flow for Numerically Controlled Oscillators. ESM (2002)
Ireneusz Janiszewski, Bernhard Hoppe, Hermann Meuth
VHDL-Based Design and Design Methodology for Reusable High Performance Direct Digital Frequency Synthesizers. DAC (2001)