Goro Suzuki

Publication Activity (10 Years)

Years Active: 1990-2015
Publications (10 Years): 1

Top Topics

Reduction Method

Parallel Processing

Top Venues

Publications

Goro Suzuki
Waveform base clock tree delay analysis using parallel processing. ASICON (2015)
Goro Suzuki, Ryo Yamanaka
Interconnect waveform calculation method with parameter variation. ASICON (2013)
Goro Suzuki
Multiple terminal reduction method. SoCC (2013)
Goro Suzuki
Separate projection and extended Cauer method for circuit reduction. ASICON (2011)
Nobuyuki Mihara, Goro Suzuki
VLSI interconnect delay analysis method for ramp input signal. ASICON (2011)
Goro Suzuki, Tetsuya Yamamoto, Kyoji Yuyama, Kotaro Hirasawa
MOSAIC: a tile-based datapath layout generator. ICCAD (1992)
Goro Suzuki, Yoshio Okamura
A Practical Online Design Rule Checking System. DAC (1990)