Chih-Hsiu Lin

Publication Activity (10 Years)

Years Active: 2003-2006
Publications (10 Years): 0

Publications

Chih-Hsiu Lin, An-Yeu Wu, Fan-Min Li
High-Performance VLSI Architecture of Decision Feedback Equalizer for Gigabit Systems. IEEE Trans. Circuits Syst. II Express Briefs (9) (2006)
Chih-Hsiu Lin, An-Yeu Wu
Soft-threshold-based multilayer decision feedback equalizer (STM-DFE) algorithm and VLSI architecture. IEEE Trans. Signal Process. 53 (8-2) (2005)
Chih-Hsiu Lin, An-Yeu Wu
Low cost decision feedback equalizer (DFE) design for Giga-bit systems. ICASSP (3) (2005)
Chih-Hsiu Lin, An-Yeu Wu
Mixed-scaling-rotation CORDIC (MSR-CORDIC) algorithm and architecture for high-performance vector rotational DSP applications. IEEE Trans. Circuits Syst. I Regul. Pap. (11) (2005)
Jen-Chih Kuo, Ching-Hua Wen, Chih-Hsiu Lin, An-Yeu Wu
VLSI Design of a Variable-Length FFT/IFFT Processor for OFDM-Based Communication Systems. EURASIP J. Adv. Signal Process. 2003 (13) (2003)
Cheng-Shing Wu, An-Yeu Wu, Chih-Hsiu Lin
A high-performance/low-latency vector rotational CORDIC architecture based on extended elementary angle set and trellis-based searching schemes. IEEE Trans. Circuits Syst. II Express Briefs 50 (9) (2003)