Chi-Li Yu

Publication Activity (10 Years)

Years Active: 2001-2013
Publications (10 Years): 0

Top Venues

ISCAS

J. Signal Process. Syst.

Arizona State University, Tempe, USA (PHD)

Education History

Arizona State University, Tempe, USA

PHD

Publications

Ahmed Al-Maashri, Matthew Cotter, Nandhini Chandramoorthy, Michael DeBole, Chi-Li Yu, Vijaykrishnan Narayanan, Chaitali Chakrabarti
Hardware Acceleration for Neuromorphic Vision Algorithms. J. Signal Process. Syst. 70 (2) (2013)
Chi-Li Yu, Chaitali Chakrabarti
Transpose-free SAR imaging on FPGA platform. ISCAS (2012)
Chi-Li Yu, Kevin M. Irick, Chaitali Chakrabarti, Vijaykrishnan Narayanan
Multidimensional DFT IP Generator for FPGA Platforms. IEEE Trans. Circuits Syst. I Regul. Pap. (4) (2011)
Ahmed Al-Maashri, Michael DeBole, Chi-Li Yu, Vijaykrishnan Narayanan, Chaitali Chakrabarti
A hardware architecture for accelerating neuromorphic vision algorithms. SiPS (2011)
Michael DeBole, Ahmed Al-Maashri, Matthew Cotter, Chi-Li Yu, Chaitali Chakrabarti, Vijaykrishnan Narayanan
A framework for accelerating neuromorphic-vision algorithms on FPGAs. ICCAD (2011)
Chi-Li Yu, Jungsub Kim, Lanping Deng, Srinidhi Kestur, Vijaykrishnan Narayanan, Chaitali Chakrabarti
FPGA Architecture for 2D Discrete Fourier Transform Based on 2D Decomposition for Large-sized Data. J. Signal Process. Syst. 64 (1) (2011)
Michael DeBole, Yang Xiao, Chi-Li Yu, Ahmed Al-Maashri, Matthew Cotter, Chaitali Chakrabarti, Vijaykrishnan Narayanan
FPGA-accelerator system for computing biologically inspired feature extraction models. ACSCC (2011)
Chi-Li Yu, Chaitali Chakrabarti, Sungho Park, Vijaykrishnan Narayanan
Bandwidth-intensive FPGA architecture for multi-dimensional DFT. ICASSP (2010)
Jungsub Kim, Chi-Li Yu, Lanping Deng, Srinidhi Kestur, Vijaykrishnan Narayanan, Chaitali Chakrabarti
FPGA architecture for 2D Discrete Fourier Transform based on 2D decomposition for large-sized data. SiPS (2009)
Lanping Deng, Chi-Li Yu, Chaitali Chakrabarti, Jungsub Kim, Vijaykrishnan Narayanan
Efficient image reconstruction using partial 2D Fourier transform. SiPS (2008)
Chi-Li Yu, Tzu-Hao Yu, An-Yeu Wu
On the Fixed-Point Properties of Mixed-Scaling-Rotation Cordic Algorithm. SiPS (2007)
Tzu-Hao Yu, Chi-Li Yu, Kai-Yuan Jheng, An-Yeu Wu
On-Line MSR-CORDIC VLSI Architecture with Applications to Cost-Efficient Rotation-Based Adaptive Filtering Systems. SiPS (2006)
Chi-Li Yu, An-Yeu Wu
An improved time-recursive lattice structure for low-latency IFFT architecture in DMT transmitter. ISCAS (4) (2001)

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Publication Activity (10 Years)

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Chi-Li Yu