Chang Nian Zhang

Publication Activity (10 Years)

Years Active: 1984-2010
Publications (10 Years): 0

Publications

Wei Dong, Yang Wang, Hua Li, Chang Nian Zhang
A Novel Watermarking Scheme for Blind Objective Image Quality Assessment. Int. J. Comput. Their Appl. 17 (1) (2010)
Hua Li, Chang Nian Zhang, Jianzhou Li
A CAM Based Associative Processor Array for Parallel Implementation of AES. Int. J. Comput. Their Appl. 13 (4) (2006)
Chang Nian Zhang, Leon Pan
A Unified Data Secure and Fault Tolerant Approach for Distributed Computing. Int. J. Comput. Their Appl. 13 (2) (2006)
Hua Li, Chang Nian Zhang, Qiang Wang
Low Complexity Programmable Cellular Automata Based Reconfigurable General Modular Mutiplier in GF(2m). Int. J. Comput. Their Appl. 12 (1) (2005)
Chang Nian Zhang, Hua Li, Nuannuan Zhang, Jiesheng Xie
A DSP Based POD Implementation for High Speed Multimedia Communications. EURASIP J. Adv. Signal Process. 2002 (9) (2002)
Hua Li, Chang Nian Zhang
Low-Complexity Versatile Finite Field Multiplier in Normal Basis. EURASIP J. Adv. Signal Process. 2002 (9) (2002)
Chang Nian Zhang, W. K. Chou, Nuannuan Zhang, Jiesheng Xie
A DSP Based POD Implementation for High Speed Multimedia Communication. PDCS (2001)
Chang Nian Zhang, Ming Zhao, Meng Wang
Logic operations based on single neuron rational model. IEEE Trans. Neural Networks Learn. Syst. 11 (3) (2000)
Chang Nian Zhang, Meng Wang
A Generalized Square-Multiply Algorithm and VLSI Array Implementation for RSA. PDPTA (1996)
Chang Nian Zhang, Meng Wang, Chien-Chao Tseng
Residue Systolic Implementations for Neural Networks. Neural Comput. Appl. 3 (3) (1995)
Chang Nian Zhang, T. M. Bachtiar, W. K. Chou
An Optimal Fault-Tolerant Design Approach for Array Processors. ICPADS (1994)
Chang Nian Zhang, Hon Fung Li, R. Jayakumar
A Systematic Approach for Designing Concurrent Error-Detecting Systolic Arrays Using Redundancy. Parallel Comput. 19 (7) (1993)
Chang Nian Zhang, Behrooz A. Shirazi, David Y. Y. Yun
An Efficient Algorithm and Parallel Implementations for Binary and Residue Number Systems. J. Symb. Comput. 15 (4) (1993)
Alen George Law, Chang Nian Zhang, Ali Rezazadeh, Lucas Jódar
Evaluation of a rational function. Numer. Algorithms 3 (1) (1992)
Chang Nian Zhang, Heng-Da Cheng
Mapping Multiple Problem Instances into a Single Systolic Array with Application to Concurrent Error Detection. ICPP (1) (1991)
David Y. Y. Yun, Y. Yun, Chang Nian Zhang
Formal verification of systolic networks using theorem proving techniques (abstract only). ACM Conference on Computer Science (1987)
Chang Nian Zhang, Behrooz A. Shirazi, David Y. Y. Yun
Parallel Designs for Chinese Remainder Conversion. ICPP (1987)
Chang Nian Zhang, Behrooz A. Shirazi, David Y. Y. Yun
Computing multiple modulo summation (abstract only): a new algorithm, its VLSI designs and applications. ACM Conference on Computer Science (1987)
David Y. Y. Yun, Chang Nian Zhang
A fast carry-free algorithm and hardware design for extended integer GCD computation. SYMSAC (1986)
David Y. Y. Yun, Chang Nian Zhang
A Programmable Systolic Array for Arithmetic Operations in Galois Fields. ICPP (1985)
Chang Nian Zhang, David Y. Y. Yun
Multi-Dimensional Systolic Networks for Discrete Fourier Transform. ISCA (1984)