Ásgeir Th. Eiríksson

Publication Activity (10 Years)

Years Active: 1995-2004
Publications (10 Years): 0

Publications

James P. G. Sterbenz, J. Bryan Lyles, Ásgeir Th. Eiríksson, Steve Klinger, Christoph L. Schuba, Jonathan S. Turner, Raj Yavatkar
Network processors: prospects for practical deployment [Panel 2]. Hot Interconnects (2004)
Ásgeir Th. Eiríksson
The Formal Design of 1M-gate ASICs. Formal Methods Syst. Des. 16 (1) (2000)
Ásgeir Th. Eiríksson
The Formal Design of 1M-gate ASICs. FMCAD (1998)
Ásgeir Th. Eiríksson
Integrating Formal Verification Methods with A Conventional Project Design Flow. DAC (1996)
Ásgeir Th. Eiríksson, Kenneth L. McMillan
Using Formal Verification/Analysis Methods on the Critical Path in System Design: A Case Study. CAV (1995)